5 research outputs found

    On attack correlation and the benefits of sharing IDS data

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    Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2005.Includes bibliographical references (p. 47-49).This thesis presents the first wide-scale study of correlated attacks, i.e., attacks mounted by the same source IP against different networks. Using a large dataset from 1700 intrusion detection systems (IDSs), this thesis shows that correlated attacks are prevalent in the current Internet; 20% of all offending sources mount correlated attacks and they account for more than 40% of all the IDS alerts in our logs. Correlated attacks appear at different networks within a few minutes of each other, indicating the difficulty of warding off these attacks by occasional offline exchange of lists of malicious IP addresses. Furthermore, correlated attacks are highly targeted. The 1700 DSs can be divided into small groups with 4-6 members that do not change with time; IDSs in the same group experience a large number of correlated attacks, while IDSs in different groups see almost no correlated attacks These results have important implications on collaborative intrusion detection of common attackers. They show that collaborating IDSs need to exchange alert information in realtime. Further, exchanging alerts among the few fixed IDSs in the same correlation group achieves almost the same benefits as collaborating with all IDSs, while dramatically reducing the overhead.by Sachin Katti.S.M

    Network coded wireless architecture

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    Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008.Includes bibliographical references (p. 183-197).Wireless mesh networks promise cheap Internet access, easy deployment, and extended range. In their current form, however, these networks suffer from both limited throughput and low reliability; hence they cannot meet the demands of applications such as file sharing, high definition video, and gaming. Motivated by these problems, we explore an alternative design that addresses these challenges. This dissertation presents a network coded architecture that significantly improves throughput and reliability. It makes a simple yet fundamental switch in network design: instead of routers just storing and forwarding received packets, they mix (or code) packets' content before forwarding. We show through practical systems how routers can exploit this new functionality to harness the intrinsic characteristics of the wireless medium to improve performance. We develop three systems; each reveals a different benefit of our network coded design. COPE observes that wireless broadcast naturally creates an overlap in packets received across routers, and develops a new network coding algorithm to exploit this overlap to deliver the same data in fewer transmissions, thereby improving throughput. ANC pushes network coding to the signal level, showing how to exploit strategic interference to correctly deliver data from concurrent senders, further increasing throughput. Finally, MIXIT presents a symbol-level network code that exploits wireless spatial diversity, forwarding correct symbols even if they are contained in corrupted packets to provide high throughput reliable transfers. The contributions of this dissertation are multifold. First, it builds a strong connection between the theory of network coding and wireless system design. Specifically, the systems presented in this dissertation were the first to show that network coding can be cleanly integrated into the wireless network stack to deliver practical and measurable gains. The work also presents novel algorithms that enrich the theory of network coding, extending it to operate over multiple unicast flows, analog signals, and soft-information.(cont.) Second, we present prototype implementations and testbed evaluations of our systems. Our results show that network coding delivers large performance gains ranging from a few percent to several-fold depending on the traffic mix and the topology. Finally, this work makes a clear departure from conventional network design. Research in wireless networks has largely proceeded in isolation, with the electrical engineers focusing on the physical and lower layers, while the computer scientists worked up from the network layer, with the packet being the only interface. This dissertation pokes a hole in this contract, disposing of artificial abstractions such as indivisible packets and point-to-point links in favor of a more natural abstraction that allows the network and the lower layers to collaborate on the common objectives of improving throughput and reliability using network coding as the building block. At the same time, the design maintains desirable properties such as being distributed, low-complexity, implementable, and integrable with the rest of the network stack.by Sachin Rajsekhar Katti.Ph.D

    Programmable Packet Scheduling at Line Rate

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    Switches today provide a small menu of scheduling algorithms. While we can tweak scheduling parameters, we cannot modify algorithmic logic, or add a completely new algorithm, after the switch has been designed. This paper presents a design for a {\em programmable} packet scheduler, which allows scheduling algorithms---potentially algorithms that are unknown today---to be programmed into a switch without requiring hardware redesign. Our design uses the property that scheduling algorithms make two decisions: in what order to schedule packets and when to schedule them. Further, we observe that in many scheduling algorithms, definitive decisions on these two questions can be made when packets are enqueued. We use these observations to build a programmable scheduler using a single abstraction: the push-in first-out queue (PIFO), a priority queue that maintains the scheduling order or time. We show that a PIFO-based scheduler lets us program a wide variety of scheduling algorithms. We present a hardware design for this scheduler for a 64-port 10 Gbit/s shared-memory (output-queued) switch. Our design costs an additional 4% in chip area. In return, it lets us program many sophisticated algorithms, such as a 5-level hierarchical scheduler with programmable decisions at each level.National Science Foundation (U.S.) (Grant CNS-1563826)Cisco Research Cente

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